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Intel announced the start of 18A-P risk production on Tuesday at the VLSI Symposium in Honolulu. The node offers performance and efficiency gains over the existing 18A process.
CnbcIntel has begun production of its 18A-P chip node, the company announced Tuesday at the VLSI Symposium in Honolulu, Hawaii. The move places the process in an early stage known as risk production. Intel foundry head Naga Chandrasekaran said in a statement that the development signals commitment to leading-edge process innovation.
"This is a journey, and while we have more work ahead, we appreciate the opportunity to share the progress we are making," Chandrasekaran said. The company said 18A-P delivers 9% higher performance, uses 18% less power, and is at least 20% more heat resistant than 18A. It is fully compatible with existing 18A buildouts.
Intel has manufactured 18A at volume in Arizona since December and introduced the process to PC chips in January. The 18A-P node was first announced last year. Chip analyst Neil Shah of Counterpoint Research said yield rate remains the top criterion.
"If they can commit to more than 90% yield rate in the first month, I think they can attract a few more customers," Shah said. Intel shares have risen more than 200% this year after climbing 84% in 2025. S.
Government acquired a 10% stake in August, and Nvidia invested $5 billion in September. Intel CEO Lip-Bu Tan told CNBC in May that the company expects commitments from multiple foundry customers in the second half of 2026. Shares rose nearly 14% that month on reports of a preliminary deal to produce chips for Apple.
Chip analyst Ben Bajarin told CNBC that Apple is likely to wait before using 18A-P. Intel primarily produces chips on x86 architecture, while Apple, Google, and Amazon use Arm-based designs. Shah noted that Intel has not previously built Arm chips.
Taiwan Semiconductor Manufacturing has expanded its $165 billion chipmaking campus 50 miles north of Intel's Arizona plant. Intel may first secure customers for its EMIB advanced packaging technology, which competes with TSMC's CoWoS process. Shah said packaging bottlenecks at TSMC present an immediate opportunity for Intel.
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