Cadence and Nvidia Create Autonomous AI Agent for RTL Design and Verification

Cadence and Nvidia developed a Level 5 ChipStack AI Super Agent that automates design verification and produces a validated circuit from design-team requirements. The agent creates test plans, orchestrates regression testing, debugs issues, and automatically fixes them.

It evaluates intermediate results, determines next actions, and iterates across specification understanding, RTL generation, verification planning, formal analysis, simulation, debug, and design convergence.

Cadence announced the world’s first agentic AI for chip design in February 2026 and said it delivered 10X productivity improvements for coding designs and test benches. Nvidia required a fully automated process for developing and validating Register-Transfer Level designs. The companies collaborated through Cadence R&D and Nvidia product teams.

The new Level 5 agent works inside the Nvidia Open Shell sandbox and couples its autonomous behavior with Cadence’s physics-based design and verification engines. Nvidia CEO Jensen Huang presented the achievement on stage at the Computex Keynote. He stated that the agent took in the design team’s requirements and produced a validated circuit.

Com reported, achieving a 40X improvement over the February 2026 result and a 40-fold reduction in verification time for Nvidia. Cadence acquired ChipStack in 2025. The Level 5 technology remains an engineering collaboration, and productization is expected to be announced in the second half of 2026.